View ALD810023_7532760.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

?2013 advanced linear devices, inc., vers. 1.0 www.aldinc.com 1 of 17 e epad tm ? n a b l e d e a daned l nea d ee n general description the ald8100xx and ald9100xx family of supercapacitor auto balancing mosfets, or sab? mosfets, are epad ? mosfets designed to address leakage balance of supercapacitors connected in series. supercapacitors, also known as ultracapacitors or supercaps, when con- nected two in series, can be balanced with an ald9100xx dual package. supercaps connected two, three or four in series can be balanced with an ald8100xx quad package. ald sab mosfets have unique electrical characteristics for active con- tinuous leakage current regulation and self-balancing of stacked series- connected supercaps and, at the same time, dissipate near zero leakage currents, practically eliminating extra power dissipation. for many applications, sab mosfet automatic charge balancing offers a simple, economical and effective method to balance and regulate supercap voltages. with sab mosfets, each supercap in a series-connected stack is continuously and automatically controlled for precision effective supercap leakage current and voltage balancing. sab mosfets offer a superior alternative solution to other passive resistor-based or operational amplifier based balancing schemes, which typically contribute continuous power dissipation due to linear currents at all voltage levels. they are also a preferred alternative to many other active supercap charging and balancing regulator ics where tradeoffs in cost, efficiency, complexity and power dissipation are important design considerations. the sab mosfet provides regulation of the voltage across a supercap cell by increasing its drain current exponentially across the supercap when supercap voltages increase, and by decreasing its drain current exponentially across the supercap when supercap voltages decrease. when a supercap in a supercap stack is charged to a voltage less than 90% of the desired voltage limit, the sab mosfet across the supercap is turned off and there is zero leakage current contribution from the sab mosfet. on the other hand, when the voltage across the supercap is over the desired voltage limit, the sab mosfet is turned on to increase its drain currents to keep the over-voltage from rising across the supercap. however, the voltages and leakages of other supercaps in the stack are lowered simultaneously to maintain near-zero net leakage currents. the ald8100xx/ald9100xx sab mosfet family offers the user a se- lection of different threshold voltages for various supercap nominal volt- age values and desired leakage balancing characteristics. each sab mosfet generally requires connecting its v+ pin to the most positive voltage and its v- and ic pins to the most negative voltage within the package. note that each drain pin has an internal reverse biased diode to its source pin, and each gate pin has a reverse biased diode to v-. all other pins must have voltages within v+ and v- voltage limits. standard esd protection facilities and handling procedures for static sensitive de- vices must also be used. quad supercapacitor auto balancing (sab ? ) mosfet array applications ? series-connected supercapacitor cell leakage balancing ? energy harvesting ? zero-power voltage divider at selected voltages ? matched current mirrors and current sources ? zero-power mode maximum voltage limiter ? scaled supercapacitor stacks and arrays ALD810023/ald810024/ald810025/ ald810026/ald810027/ald810028 *ic pins are internally connected, connect to v- scl packages pin configuration ald8100xx ordering information (?l? suffix denotes lead-free (rohs)) * contact factory for industrial temp. range or user-specified threshold voltage values. operating temperature range* 0 c to +70 c 16-pin soic package ALD810023scl ald810026scl ald810024scl ald810027scl ald810025scl ald810026scl features & benefits ? simple and economical to use ? precision factory trimmed ? automatically regulates and balances leakage currents ? effective for supercapacitor charge-balancing ? balances up to 4 supercaps with a single ic package ? balances 2-cell, 3-cell, 4-cell series-connected supercaps ? scalable to larger supercap stacks and arrays ? near zero additional leakage currents ? zero leakage at 0.3v below rated voltages ? balances with series-connect and parallel-connect ? leakage currents are exponential fuction of cell voltages ? active current ranges from < 0.3na to > 1000 a ? always active, always fast response time ? minimizes leakage currents and power dissipation d n1 g n1 ic* d n4 s n4 g n4 s n1 v- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 d n2 g n2 ic* d n3 s n3 g n3 s n2 v+ v- v- m2 m1 m4 m3 v- v-
ALD810023, ald810024, ald810025, advanced linear devices, inc. 2 of 17 ald810026, ald810027, ald810028 typical applications ald8100xx pin diagram typical connection for a four-supercap stack example of ald810025 connection across four supercaps in series schematic diagram of a typical connection for a four-supercap stack 1-16 denotes package pin numbers c1-c4 denotes supercapacitors 1-16 denotes package pin numbers c1-c4 denotes supercapacitors 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 v1 c2 v2 c3 v+ v1 v3 c4 + + + c1 + v + v- v- m2 m1 m4 m3 v- v- d n1 g n1 ic* d n4 s n4 g n4 s n1 v- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 d n2 g n2 ic* d n3 s n3 g n3 s n2 v+ v- v- m2 m1 m4 m3 v- v- m1 m2 m3 m4 v+ = 10.0v 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 ald810025 c4 + + v 1 7.5v v 2 5.0v v 3 2.5v v t =2.5v v t =2.5v v t =2.5v v t =2.5v c3 + c2 + c1 v+ +15.0v 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 ald8100xx c4 + + c3 + c2 + c1 m1 m2 m3 m4 v 1 v 2 v 3 i ds(on) 80ma
ALD810023, ald810024, ald810025, advanced linear devices, inc. 3 of 17 ald810026, ald810027, ald810028 typical applications (cont.) typical parallel connection of sab mosfets with two supercaps series connection of two four-supercap stacks each with a separate sab mosfet package example of ald810025 connection across two supercaps in series 1-16 denotes package pin numbers c1-c2 denotes supercapacitors 1-16 denotes package pin numbers c1-c2 denotes supercapacitors 1-16 denotes package pin numbers c1a-c4b denotes supercapacitors m1 m2 m3 m4 v+ = 10.0v 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 ald810025 v 1 5.0v + c1 + c2 ald8100xx m1 m2 m3 m4 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 + + v+ +15.0v c2 c1 v 1 i ds(on) 80ma v+ +30.0v 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 ald8100xx stack 1 v+ - v a +15.0v c4a + + c3a + c2a + c1a m1 m2 m3 m4 1, 5, 8, 16 2, 12 3 4 6 7 9 10 11 13 14 15 c4b + + c3b + c2b + c1b m1 m2 m3 m4 ald8100xx stack 2 v a +15.0v v a (2 x 15.0v) i ds(on) 80ma
ALD810023, ald810024, ald810025, advanced linear devices, inc. 4 of 17 ald810026, ald810027, ald810028 typical applications (cont.) 1-16 denotes package pin numbers c1a-c3b denotes supercapacitors 1-16 denotes package pin numbers c1-c3 denotes supercapacitors typical series connection of sab mosfets with three supercaps series connection of two three-supercap stacks each with a separate sab mosfet package example of ald810028 connection across three supercaps in series 1-16 denotes package pin numbers c1-c3 denotes supercapacitors m1 m2 m3 v+ = 8.1v 1, 5, 6, 7, 8, 16 2, 12 3 4 10 11 13 14 15 v t =2.8v v 1 = 5.4v v 2 = 2.7v v t =2.8v v t =2.8v c1 c2 c3 + + + ald810028 9 m1 m2 m3 1, 5, 6, 7, 8, 16 2, 12 3 4 10 11 13 14 15 c1 c2 c3 + + + ald8100xx v+ +15.0v 9 v 1 v 2 i ds(on) 80ma m1 m2 m3 1, 5, 6, 7, 8, 16 2, 12 3 4 10 11 13 14 15 c1a c2a c3a + + + m1 m2 m3 1, 5, 6, 7, 8, 16 2, 12 3 4 10 11 13 14 15 c1b c2b c3b + + + v+ +30.0v ald8100xx stack 1 v+ - v a +15.0v ald8100xx stack 2 v a +15.0v v a (2 x 15.0v) 9 9 i ds(on) 80ma
ALD810023, ald810024, ald810025, advanced linear devices, inc. 5 of 17 ald810026, ald810027, ald810028 notes: 1) the sab mosfet drain source on current (i ds(on) ) is the maximum current available to offset the supercapacitor leakage current. 2) the drain-gate source voltage (v gs =v ds ) is normally the same as the voltage across the supercapacitor. table 1. supercap auto balancing (sab ? ) mosfet equivalent on resistance at different drain-gate source voltages and drain-source on currents drain-gate gate- source sab mosfet drain-source on current ald part threshold voltage (v) 2 i ds(on) ( a) 1 t a = 25 c number voltage equivalent on v t (v) resistance (m ? ) 0.0001 0.001 0.01 0.1 1 10 100 300 1000 3000 10000 ald910028 2.80 v gs = v ds (v) 2.4 2.5 2.6 2.7 2.8 2.9 3.02 3.1 3.24 3.3 3.8 r ds(on) (m ? ) 24000 2500 260 27 2.8 0.29 0.030 0.01 0.003 0.001 0.0004 ald910027 2.70 v gs = v ds (v) 2.3 2.4 2.5 2.6 2.7 2.8 2.92 3.0 3.14 3.2 3.7 r ds(on) (m ? ) 23000 2400 250 26 2.7 0.28 0.029 0.01 0.003 0.001 0.0004 ald910026 2.60 v gs = v ds (v) 2.2 2.3 2.4 2.5 2.6 2.7 2.82 2.9 3.04 3.1 3.6 r ds(on) (m ? ) 22000 2300 240 25 2.6 0.27 0.028 0.01 0.003 0.001 0.0004 ald910025 2.50 v gs = v ds (v) 2.1 2.2 2.3 2.4 2.5 2.6 2.72 2.8 2.94 3.0 3.5 r ds(on) (m ? ) 21000 2200 230 24 2.5 0.26 0.027 0.01 0.003 0.001 0.0004 ald910024 2.40 v gs = v ds (v) 2.0 2.1 2.2 2.3 2.4 2.5 2.62 2.7 2.84 2.9 3.4 r ds(on) (m ? ) 20000 2100 220 23 2.4 0.25 0.026 0.009 0.003 0.001 0.0003 ald910023 2.30 v gs = v ds (v) 1.9 2.0 2.1 2.2 2.3 2.4 2.52 2.6 2.74 2.8 3.3 r ds(on) (m ? ) 19000 2000 210 22 2.3 0.24 0.025 0.009 0.003 0.001 0.0003 drain-gate gate- source sab mosfet drain-source on current ald part threshold voltage (v) 2 i ds(on) ( a) 1 t a = 25 c number voltage equivalent on v t (v) resistance (m ? ) 0.0001 0.001 0.01 0.1 1 10 100 300 1000 3000 10000 ald810028 2.80 v gs = v ds (v) 2.4 2.5 2.6 2.7 2.8 2.9 3.04 3.14 3.32 3.62 4.22 r ds(on) (m ? ) 24000 2500 260 27 2.8 0.29 0.030 0.01 0.003 0.001 0.0004 ald810027 2.70 v gs = v ds (v) 2.3 2.4 2.5 2.6 2.7 2.8 2.94 3.04 3.22 3.52 4.12 r ds(on) (m ? ) 23000 2400 250 26 2.7 0.28 0.029 0.01 0.003 0.001 0.0004 ald810026 2.60 v gs = v ds (v) 2.2 2.3 2.4 2.5 2.6 2.7 2.84 2.94 3.12 3.42 4.02 r ds(on) (m ? ) 22000 2300 240 25 2.6 0.27 0.028 0.01 0.003 0.001 0.0004 ald810025 2.50 v gs = v ds (v) 2.1 2.2 2.3 2.4 2.5 2.6 2.74 2.84 3.02 3.32 3.92 r ds(on) (m ? ) 21000 2200 230 24 2.5 0.26 0.027 0.01 0.003 0.001 0.0004 ald810024 2.40 v gs = v ds (v) 2.0 2.1 2.2 2.3 2.4 2.5 2.64 2.74 2.92 3.22 3.82 r ds(on) (m ? ) 20000 2100 220 23 2.4 0.25 0.026 0.009 0.003 0.001 0.0004 ALD810023 2.30 v gs = v ds (v) 1.9 2.0 2.1 2.2 2.3 2.4 2.54 2.64 2.82 3.12 3.72 r ds(on) (m ? ) 19000 2000 210 22 2.3 0.24 0.025 0.009 0.003 0.001 0.0004 selection of a sab mosfet device depends on a set of desired voltage vs. current characteristics that closely match the selecte d nominal bias voltage and bias currents that provide the best leakage and regulation profile of a supercap load. the v t table, where drain-gate source voltage (v gs = v ds ) gives a range of v gs = v ds bias voltages as different v supercap load voltages. at each v gs = v ds bias voltage, a corresponding drain-source on current (i ds(on) ) is produced by a specific sab mosfet, which can be viewed as the amount of current available to compensate for supercap leaka ge current imbalances and results in an equivalent on resistance (r ds(on) )across a supercap cell. selection of a supercap bias voltage with a sab mosfet i ds(on) that corresponds to the maximum supercap leakage current would result in the best possible tradeoff between leakage current ba lancing and voltage regulation.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 6 of 17 ald810026, ald810027, ald810028 supercaps supercaps are typically rated with a nominal recommended working voltage established for long life at their maximum rated operating temperature. excessive supercap voltages that exceed its rated voltage for a prolonged time period will result in reduced lifetime and eventual rupture and catastrophic failure. to prevent such an occurrence, a means of automatically adjusting (charge- balancing) and monitoring the maximum voltage is required in most applications having two or more supercaps connected in series, due to their different internal leakage currents that vary from one supercap to another. the supercap leakage current itself is a variable function of its many parameters such as aging, initial leakage current at zero input voltage, the material and construction of the supercap. its leakage is also a function of the charging voltage, the charging current, operating temperature range and the rate of change of many of these parameters. supercap balancing must accommodate these changing conditions. supercap charging and discharging during supercap charging, consideration must be paid to limit the rate of supercap charging so that excessive voltage and current do not build up across any two pins of the sab mosfets, even momentarily, to exceed their absolute maximum rating. in most cases though, this is not an issue, as there may be other design constraints elsewhere in the circuit to limit the rate of charging or discharging the supercaps. for many types of applications, no further action, other than checking the voltage and current excur- sions, or including a simple current-limiting charging resistor, is nec- essary. characteristics of supercap auto balancing (sab?) mosfets the principle behind the supercap auto balancing mosfet in balancing supercaps is basically simple. it is based on the natural threshold characteristics of a mosfet device. the threshold volt- age of a mosfet is the voltage at which a mosfet turns on and starts to conduct a current. the drain current of the mosfet, at or below its threshold voltage, is an exponentially non-linear function of its gate voltage. hence, for small changes in the mosfet?s gate voltage, its on-current can vary greatly, by orders of magni- tude. ald?s sab mosfets are designed to take advantage of this fundamental device characteristic. sab mosfets can be connected in parallel or in a series, to suit the desired leakage current characteristics, in order to charge- balance an array of supercaps. the combined sab mosfet and supercap array is designed to be self-regulating with various supercap array leakage mismatches and environmental temperature changes. the sab mosfets can also be used only in the subthreshold mode, meaning the sab mosfet is used entirely at min., nominal and max. operating voltages in voltage ranges below its specified threshold voltage. for the ald8100xx/ald9100xx family of sab mosfets, the threshold voltage v t of a sab mosfet is defined as its drain-gate source voltage at a drain-source on current, i ds(on) = 1 a when its gate and drain terminals are connected together (v gs = v ds ). this voltage is specified as xx, where the threshold voltage is in 0.10v increments. for example, the ald810025 features a 2.50v threshold voltage mosfet with drain-gate source voltage, v t = 2.50v, and i ds(on) = 1 a. the sab mosfet has a precision trimmed threshold voltage where the tolerance of the threshold voltage is very tight, typically 2.50v +/-0.005v. when a 2.50v drain- gate source voltage bias is applied across an ald810025/ ald910025 sab mosfet, it conducts an i ds(on) = 1 a. general description (cont.) as all ald8100xx and ald9100xx devices operate the same way, an ald810025 is used in the following illustration. at voltages be- low its threshold voltage, the ald810025 rapidly turns off at a rate of approximately one decade of current per 104mv of voltage drop. hence, at v gs = v ds = 2.396v, the ald810025 has drain current of 0.1 a. at v gs = v ds = 2.292v, the ald810025 drain current becomes 0.01 a. at v gs = v ds = 2.188v, the drain current is 0.001 a. it is apparent that at v gs = v ds 2.10v, the drain leak- age current 0.00014 a, which is essentially zero when compared to 1 a initial threshold current. when individual v gs = v ds volt- ages fall below 1.9v, the sab mosfet leakage current essentially goes to zero (~70pa). this exponential relationship between the drain-gate source voltage and the drain-source on current is an important consideration for replacing certain supercap charge balancing applications currently using fixed resistor or operational amplifier charge balancing. these other conventional charge-balancing cir- cuits would continue to dissipate a significant amount of current, even after the voltage across the supercaps had dropped, because the current dissipated is a linear function, rather than an exponen- tial function, of the supercap voltage (i = v/r). for supercap stacks consisting of more than two supercaps, the challenge of supercap balancing becomes more onerous. for other ic circuits that offer charge balancing, active power is still being consumed even if the supercap voltage falls below 2.0v. for a four-cell supercap stack, this translates into a 2.0v x 4 ~= 8.0v power supply for an ic charge-balancing circuit. even a two-cell supercap stack would be operating such an ic circuit with 2.0v x 2 = 4v. a supercap stack with sab mosfet charge- balancing, on the other hand, would be the only way to lose exponentially decreasing amount of charge with time and preserve by far the greatest amount of charge on each of the supercaps, by not adding charge loss to the leakages contributed by the supercaps themselves. at v gs = v ds voltages of the ald810025 above its v t threshold voltage, its drain current behavior has the opposite near-exponen- tial effect. at v gs = v ds = 2.60v, for example, the ald810025 i ds(on) increases tenfold to 10 a. similarly, i ds(on) becomes 100 a for a v gs = v ds voltage increase to 2.74v, and 300 a at 2.84v. (see table 1) as i ds(on) changes rapidly with applied voltage on the drain-gate to source pins, the sab mosfet device acts like a voltage limiting regulator with self-adjusting current levels. when this sab mosfet is connected across a supercap cell, the total leakage current across the supercap is compensated and corrected by the sab mosfet. consider the case when two supercap cells are connected in series, each with a sab mosfet connected across it in the v t mode (v ds = v gs ), charged by a power supply to a voltage equal to 2 x v s . if the top supercap has a higher internal leakage current than the bottom supercap, the voltage v s(top) across it tends to drop lower than that of the bottom supercap. the sab mosfet i ds(on) across the top supercap, sensing this voltage drop, drops off rapidly. meanwhile, the bottom supercap v s(bottom) voltage tends to rise, as v s(bottom) = (2 x v s ) - v s(top) . this tendency for the voltage rise also increases v gs = v ds voltage of the sab mosfet across the bottom supercap. this increased v gs = v ds voltage would cause the i ds(on) current of the bottom sab mosfet to increase rapidly as well. the excess leakage current of the top supercap would now leak across the bottom sab mosfet, reducing the voltage rise tendency of the lower supercap. with this self-regulat- ing mechanism, the top supercap, v s(top) , voltage tends to rise while the bottom supercap, v s(bottom) , voltage tends to drop, creating simultaneously opposing actions of the supercap leakage currents.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 7 of 17 ald810026, ald810027, ald810028 with appropriate design and selection of a specific sab mosfet device for a given pair of supercaps, it is now possible to have regulation and balancing of two series-connected supercaps, at essentially no extra leakage current, since the sab mosfet only conducts the difference in leakage current between the two supercaps. likewise, the case of the bottom supercap having a higher leakage current than that of the top supercap works in similar fashion, with the tendency of the bottom supercap, v s(bottom) , voltage to drop, compensated by the tendency of the top supercap, v s(top) , voltage to drop as well, effected by the top sab mosfet. this sab mosfet charge balancing scheme also extends to up to four supercaps in a series network by using four sab mosfets in a single ald8100xx sab mosfet package. as ambient temperature increases, the supercap leakage current, as a function of temperature, increases. the sab mosfet thresh- old voltage is reduced with temperature increase, which causes the drain current to increase with temperature as well. this drain current increase compensates for the leakage current increase within the supercap, reducing the overall supercap temperature leakage effect and preserving charge balancing effectiveness. this tem- perature compensation assumes that all the supercaps and the sab mosfets are in the same temperature environments. each drain pin of a sab mosfet has an internal reverse biased diode to its source pin, which can become forward biased if the drain voltage should become negative relative to its source pin. this forward-biased diode clamps the drain voltage to limit the negative voltage relative to its source voltage, and is limited to 80ma max. rated current between any two pins. specifying sab? mosfets the process of selecting sab mosfets begins by analyzing the parameters and the requirements of a given selection of supercaps: 1) for better leakage current matching results, pick the same make and model of supercaps to be connected in a series. if possible, select supercaps from the same production batch. (note: sab mosfets are precisely set at the factory and specified such that their lot-to-lot and mosfet-to-mosfet variation is not a concern.) 2) determine the leakage current range of the supercaps. 3) determine the desired nominal operating voltage of the supercaps. 4) determine the maximum operating voltage rating of the supercaps. 5) calculate or measure the maximum leakage current of the supercap at the maximum rated operating voltage. 6) determine the operating temperature range of the supercaps. 7) determine any additional level of operating leakage current in the system. next, determine the normalized drain current of a sab mosfet at a pre-selected operating voltage. for example, the ald810025 has a rated leakage, or drain, current of 1 a at applied drain-gate source voltage of 2.50v. if the desired normalized drain current is 0.01 a, then the ald810025 would give a bias drain-gate source voltage of approximately 2.3v at that current, which produces an equivalent on resistance of 2.3v/0.01 a ~= 230m ? (using the rule of thumb of one decade of current change per 0.10v of v gs = v ds change). a design example a single 5v power supply using two 2.7v rated supercaps con- nected in a series and a single sab mosfet array package. for a supercap with: 1) max. operating voltage = 2.70v and 2) max. leakage current = 10 a at 70 c. 3) at 2.50v, the supercap max. leakage current = 2.5 a at 25 c. next, pick ald810026, a sab mosfet with v t = 2.60v. for this device, at v gs = v ds = 2.60v, the nominal i ds(on) = 1 a. per the leakage current table, at v gs = v ds = 2.50v, i ds(on) ~= 0.1 a. at a nominal operating voltage of 2.50v, the additional leakage current contribution by the ald810026 is therefore 0.1 a. the total current for the supercap and the sab mosfet = 2.5 a + 0.1 a ~= 2.6 a @ 2.50v operating voltage. at an operating voltage of 2.40v, the additional ald810026 leakage current decreases to about 0.01 a. at a max. voltage of 2.70v across the ald810026 sab mosfet, v gs = v ds = 2.70v results in i ds(on) = 10 a. 10 a is also the max. leakage current margin, the difference between top and bot- tom supercap leakage currents that can be compensated. if a higher max. leakage current margin is desired for an applica- tion, then the selection may need to go to the next sab mosfet down in the series, ald810025. for an ald810025 operating at a max. rated voltage of 2.70v, the max. leakage current margin is ~= 50 a. for this device, the nominal operating current at 2.50v is ~= 1 a, which is the average current consumption for the series- connected stack. the total current for the supercap and the sab mosfet is = 2.5 a + 1 a ~= 3.5 a @ 2.50v operating voltage. because the sab mosfet is always active and always in ?on? mode, there is no circuit switching or sleep mode involved. this may become an important factor when the time interval between the supercap discharging or recharging, and other events happen- ing in the application, is long, unknown or variable. in real life situations, the actual circuit behavior is a little different, further reducing overall leakage currents from both supercaps and sab mosfets, due to the automatic compensation for different leakage current levels by both the supercaps themselves and in combination with the sab mosfets. take the above example of two supercaps in series, assuming that the top supercap is leaking 10 a and the bottom one leaking 4 a (both at the rated 2.7v max.) while the power supply remains at 5v dc. the actual voltage across the top supercap tends to be less than 50% of 5.0v, due to its internal leakage current, and results in a lowered current level be- cause the voltage across it tends to be lower as well. the total voltage across both supercaps is still 5.0v, so each supercap would experience a lowered voltage at less than maximum rated voltage of 2.7v, thereby resulting in reduced overall leakage currents in each of the two supercaps. these leakage currents are then further regulated by the sab mosfets connected across each of the supercaps. the end re- sult is a compensated condition where the top supercap has ~2.4v and the bottom cap has a voltage of ~2.6v. the excess leakage current of the top supercap is bypassed across the bottom sab mosfet, so that there is little or no net additional leakage current introduced by the bottom sab mosfet. meanwhile the top sab mosfet, with ~2.4v across it, is biased to conduct (or leak) very little drain current. note also that the top supercap is now biased at ~2.4v and, therefore, would experience less current leakage than general description (cont.)
ALD810023, ald810024, ald810025, advanced linear devices, inc. 8 of 17 ald810026, ald810027, ald810028 general description (cont.) when it is at 2.7v. the primary benefit here is that this process of leakage balancing is fully automatic and works for a variety of supercaps, each with a different leakage characteristic profile of its own. a second benefit to note is that with ~2.4v and ~2.6v across the two supercaps, in this example, the actual current level difference between the top and the bottom sab mosfets is at about a 100:1 ratio (~2 orders of magnitude). the net additional leakage current contributed by the ald8110026 in the design example above would, therefore, be approximately 0.01 a. in this case, the difference in leakage currents between the two supercaps can have a ratio of 100:1 and could still have charge balancing and voltage regulation. the dynamic response of a sab mosfet circuit is very fast, and the typical response time is determined by the r c time constant of the equivalent on resistance value of the sab mosfet and the capacitance value of the supercap. in many cases the r value is small initially, responding rapidly to a large voltage transient by having a smaller r c time constant. as the voltages settle down, the equivalent r increases. as these r and c values can become very large, it can take a long time for the voltages across the supercaps to settle down to steady state leakage current levels. the direction of the voltage movements across the supercap, however, would indicate the trend that the supercap voltages are moving away from the voltage limits. parallel-connected and series-connected sab mosfets in the previous design example, note that the ald810026 is a quad pack, with four sab mosfets in a single soic package. for a standard configuration of two supercaps connected in series, the ald9100xx dual sab mosfet is recommended for charge balancing. if a two-stack supercap requires charge balancing, then there is also an option to parallel-connect two sab mosfets of a quad ald8100xx for each of the two supercaps. parallel-connec- tion generally means that the drain, gate and source terminals of each of two sab mosfets are connected together to form a mosfet with a single drain, a single gate and a single source terminal with twice the output currents. in this case, at a nominal operating voltage of 2.50v, the additional leakage current contribu- tion by the sab mosfet is equal to 2 x 0.1 a = 0.2 a. the total current for the supercaps and the sb mosfet is = 2.5 a + 0.2 a ~= 2.7 a @ 2.50v operating voltage. at max. voltage of 2.70v across the sab mosfet, v gs = v ds = 2.70v results in a drain current of 2 x 10 a = 20 a. so this configuration would be chosen to increase max. charge balancing leakage current at 2.70v to 20 a, at the expense of an additional 0.1 a leakage at 2.50v. this method also extends to four supercaps in series, although this may require two separate ald810026 packages, if the maximum voltage ratings of the sab mosfet are exceeded. for stacks of series-connected supercaps consisting of more than three or four supercaps, it is possible to use a single sab mosfet array for every three or four supercap stacks connected in series. multiple sab mosfet arrays can be arrayed across multiple supercap stacks to operate at higher operating voltages. it is important to limit the voltage across any two pins within a single sab mosfet array package to be less than its absolute maximum voltage and current ratings. energy harvesting applications supercaps offer an important benefit for energy harvesting appli- cations from a low energy source, buffering and storing such energy to drive a higher power load. for energy harvesting applications, supercap leakage currents are a critical factor, as the average energy harvesting input charge must exceed the average supercap internal leakage currents in order for any net energy to be harvested and saved. often times the input energy is variable, meaning that its input voltage and current magnitude is not constant and may be dependent upon a whole set of other parameters such as the source energy availability, energy sensor conversion efficiency, etc. for these types of applications, it is essential to pick supercaps with low leakage specifications and to use sab mosfets that minimize the amount of energy loss due to leakage currents. for up to 90% of the initial voltages of a supercap used in energy harvesting applications, supercap charge loss is lower than its maximum leakage rating, at less than its max. rated voltage. sab mosfets used for charge balancing, due to their high input thresh- old voltages, would be completely turned off, consuming zero drain current while the supercap is being charged, maximizing any energy harvesting gathering efforts. the sab mosfet would not become active until the supercap is already charged to over 90% of its max. rated voltage. the trickle charging of supercaps with energy harvesting techniques tends to work well with sab mosfets as charge balancing devices, as it is less likely to have high transient energy spurts resulting in excessive voltage or current excursions. if an energy harvesting source only provides a few a of current, the power budget does not allow wasting any of this current on capacitor leakage currents and power dissipation of resistor or operational amplifier based charge-balancing circuits. it may also be important to reduce long term leakage currents, as energy harvesting charging at low levels may take up to many days. in summary, in order for an energy harvesting application to be successful, the input energy harvested must exceed all the energy required due to the leakages of the supercaps and the charge- balancing circuits, plus any load requirements. with their unique balancing characteristics and near-zero charge loss, sab mosfets are ideal devices for use in supercap charge-balancing in energy harvesting applications.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 9 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ALD810023 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.28 2.30 2.32 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =1.90v drain source on resistance r ds(on) 19000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.00v drain source on resistance r ds(on) 2000 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.10v drain source on resistance r ds(on) 210 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.20v drain source on resistance r ds(on) 22 m ? drain source on current i ds(on) 1 av gs =v ds =2.30v drain source on resistance r ds(on) 2.3 m ? drain source on current i ds(on) 10 av gs =v ds =2.40v drain source on resistance r ds(on) 0.24 m ? drain source on current i ds(on) 100 av gs =v ds =2.54v drain source on resistance r ds(on) 0.025 m ? drain source on current i ds(on) 300 av gs =v ds =2.64v drain source on resistance r ds(on) 0.009 m ? drain source on current i ds(on) 1000 av gs =v ds =2.82v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.12v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =3.72v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5 200 pa v gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 10 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ald810024 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.38 2.40 2.42 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =2.00v drain source on resistance r ds(on) 20000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.10v drain source on resistance r ds(on) 2100 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.20v drain source on resistance r ds(on) 220 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.30v drain source on resistance r ds(on) 23 m ? drain source on current i ds(on) 1 av gs =v ds =2.40v drain source on resistance r ds(on) 2.4 m ? drain source on current i ds(on) 10 av gs =v ds =2.50v drain source on resistance r ds(on) 0.25 m ? drain source on current i ds(on) 100 av gs =v ds =2.64v drain source on resistance r ds(on) 0.026 m ? drain source on current i ds(on) 300 av gs =v ds =2.74v drain source on resistance r ds(on) 0.009 m ? drain source on current i ds(on) 1000 av gs =v ds =2.92v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.22v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =3.82v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5 200 pa v gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 11 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ald810025 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.48 2.50 2.52 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =2.10v drain source on resistance r ds(on) 21000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.20v drain source on resistance r ds(on) 2200 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.30v drain source on resistance r ds(on) 230 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.40v drain source on resistance r ds(on) 24 m ? drain source on current i ds(on) 1 av gs =v ds =2.50v drain source on resistance r ds(on) 2.5 m ? drain source on current i ds(on) 10 av gs =v ds =2.60v drain source on resistance r ds(on) 0.26 m ? drain source on current i ds(on) 100 av gs =v ds =2.74v drain source on resistance r ds(on) 0.027 m ? drain source on current i ds(on) 300 av gs =v ds =2.84v drain source on resistance r ds(on) 0.01 m ? drain source on current i ds(on) 1000 av gs =v ds =3.02v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.32v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =3.92v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5 200 pa v gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 12 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ald810026 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.58 2.60 2.62 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =2.20v drain source on resistance r ds(on) 22000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.30v drain source on resistance r ds(on) 2300 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.40v drain source on resistance r ds(on) 240 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.50v drain source on resistance r ds(on) 25 m ? drain source on current i ds(on) 1 av gs =v ds =2.60v drain source on resistance r ds(on) 2.6 m ? drain source on current i ds(on) 10 av gs =v ds =2.70v drain source on resistance r ds(on) 0.27 m ? drain source on current i ds(on) 100 av gs =v ds =2.84v drain source on resistance r ds(on) 0.028 m ? drain source on current i ds(on) 300 av gs =v ds =2.94v drain source on resistance r ds(on) 0.01 m ? drain source on current i ds(on) 1000 av gs =v ds =3.12v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.42v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =4.02v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5 200 pa v gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 13 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ald810027 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.68 2.70 2.72 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =2.30v drain source on resistance r ds(on) 23000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.40v drain source on resistance r ds(on) 2400 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.50v drain source on resistance r ds(on) 250 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.60v drain source on resistance r ds(on) 26 m ? drain source on current i ds(on) 1 av gs =v ds =2.70v drain source on resistance r ds(on) 2.7 m ? drain source on current i ds(on) 10 av gs =v ds =2.80v drain source on resistance r ds(on) 0.28 m ? drain source on current i ds(on) 100 av gs =v ds =2.94v drain source on resistance r ds(on) 0.029 m ? drain source on current i ds(on) 300 av gs =v ds =3.04v drain source on resistance r ds(on) 0.01 m ? drain source on current i ds(on) 1000 av gs =v ds =3.22v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.52v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =4.12v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5 200 pa v gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 14 of 17 ald810026, ald810027, ald810028 operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified ald810028 parameter symbol min typ max unit test conditions gate threshold voltage v t 2.78 2.80 2.82 v v gs =v ds; i ds(on) =1 a offset voltage v os 520mvv t1 - v t2 or v t3 - v t4 offset voltage tempco tc vos 5 v/c v t1 - v t2 or v t3 - v t4 gate threshold voltage tempco tc vt -2.2 mv/c v gs =v ds; i ds(on) =1 a drain source on current i ds(on) 0.0001 av gs =v ds =2.40v drain source on resistance r ds(on) 24000 m ? drain source on current i ds(on) 0.001 av gs =v ds =2.50v drain source on resistance r ds(on) 2500 m ? drain source on current i ds(on) 0.01 av gs =v ds =2.60v drain source on resistance r ds(on) 260 m ? drain source on current i ds(on) 0.1 av gs =v ds =2.70v drain source on resistance r ds(on) 27 m ? drain source on current i ds(on) 1 av gs =v ds =2.80v drain source on resistance r ds(on) 2.8 m ? drain source on current i ds(on) 10 av gs =v ds =2.90v drain source on resistance r ds(on) 0.29 m ? drain source on current i ds(on) 100 av gs =v ds =3.04v drain source on resistance r ds(on) 0.030 m ? drain source on current i ds(on) 300 av gs =v ds =3.14v drain source on resistance r ds(on) 0.01 m ? drain source on current i ds(on) 1000 av gs =v ds =3.32v drain source on resistance r ds(on) 0.003 m ? drain source on current i ds(on) 3000 av gs =v ds =3.62v drain source on resistance r ds(on) 0.001 m ? drain source on current i ds(on) 10000 av gs =v ds =4.22v drain source on resistance r ds(on) 0.0004 m ? drain source breakdown voltage bv dsx 10.6 v drain source leakage current 1 i ds (off) 10 400 pa v gs =v ds =v t - 1.0 4nav gs =v ds =v t - 1.0, t a = +125 c gate leakage current 1 i gss 5200pav gs =5.0v, v ds =0v 1nav gs =5.0v, v ds =0v, t a = +125 c input capacitance c iss 15 pf v gs =0v, v ds =5.0v turn-on delay time t on 10 ns turn-off delay time t off 10 ns crosstalk 60 db f = 100khz absolute maximum ratings v+ to v- voltage 15.0v drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v operating current 80ma power dissipation 500mw operating temperature range scl 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment.
ALD810023, ald810024, ald810025, advanced linear devices, inc. 15 of 17 ald810026, ald810027, ald810028 typical performance characteristics offset voltage vs. ambient temperature +10 +8 +6 +4 +2 -2 0 -10 offset voltage v os (mv) -50 -25 0 +25 +50 +125 +100 +75 ambient temperature - t a ( c) -8 -6 -4 three representative units v os = v t m1 - v t m2 v os = v t m3 - v t m4 drain-gate source voltage vs. drain source on current drain-gate source voltage v gs = v ds (v) drain source on current i ds(on) (a) 1.0 e -02 1.0 e -03 1.0 e -04 1.0 e -05 1.0 e -06 1.0 e -07 1.0 e -08 1.0 e -09 1.0 e -10 v t +0.5 v t -0.5 v t -0.3 v t -0.1 v t +0.1 v t +0.3 v t +0.7 v t -0.7 t a = + 25 c equivalent on resistance vs. drain-gate source voltage drain-gate source voltage (v) equivalent on resistance r ds(on) (m ? ) 0.001 10000.00 1000.00 100.00 10.00 1.00 0.10 0.01 100000.00 v t -0.3 v t v t -0.4 v t -0.1 v t -0.2 v t +0.2 v t +0.1 v t +0.4 v t +0.3 t a = + 25 c drain off leakage current i ds(off) vs. ambient temperature ambient temperature - t a ( c) -50 -25 0 +25 +50 +125 +100 +75 500 400 drain off leakage current i ds(off) (pa) 300 200 600 100 0 i ds(off) v gs = v ds = v t - 1.0v forward transfer characteristics low voltage 500 400 300 200 0 100 drain source on current i ds(on) ( a) 0 +0.1 +0.2 +0.4 +0.5 +0.3 -0.3 -0.1 -0.2 drain-gate source overdrive voltage (v gs = v ds ) - v t (v) v gs = v ds t a = + 25 c drain-gate source voltage vs. drain source on current drain-gate source voltage v gs = v ds (v) drain source on current i ds(on) (a) 1.0 e -03 1.0 e -04 1.0 e -05 1.0 e -06 1.0 e -07 1.0 e -08 1.0 e -09 v t +0.3 v t -0.3 v t -0.2 v t -0.1 v t v t +0.1 v t +0.2 v t +0.4 t a +85 c +25 c 0 c +70 c
ALD810023, ald810024, ald810025, advanced linear devices, inc. 16 of 17 ald810026, ald810027, ald810028 typical performance characteristics (cont.) low level output conductance vs. ambient temperature 0.44 0.42 0.40 0.38 0.36 low level output conductance - g os ( a/v) ambient temperature - t a ( c) -50 -25 0 +25 +50 +125 +100 +75 0.34 v gs = v ds i ds = 1 a high level output conductance vs. gate threshold voltage gate threshold voltage - v t (v) 2.2 2.3 2.4 2.5 2.6 2.8 2.9 2.7 high level output conductance - g os (ma/v) 0.44 0.42 0.40 0.38 0.36 0.34 t a = + 25 c v gs = v ds i ds = 1ma low level output conductance vs. gate threshold voltage gate threshold voltage - v t (v) 2.2 2.3 2.4 2.5 2.6 2.8 2.9 2.7 low level output conductance - g os ( a/v) 0.44 0.42 0.40 0.38 0.36 0.34 t a = + 25 c v gs = v ds i ds = 1 a high level output conductance vs. ambient temperature 0.35 0.33 0.32 high level output conductance - g os (ma/v) -50 -25 0 +25 +50 +125 +100 +75 0.34 0.31 0.36 ambient temperature - t a ( c) v t = 2.3v to 2.8v i ds = 1ma transconductance vs. gate threshold voltage gate threshold voltage - v t (v) 2.2 2.3 2.4 2.5 2.6 2.8 2.9 2.7 transconductance g fs ( a/v) 88 87 86 85 89 84 t a = + 25 c v gs = v ds i ds = 1 a to 10 a low level output transconductance vs. ambient temperature 120 110 100 90 70 80 ambient temperature - t a ( c) -50 -25 0 +25 +50 +125 +100 +75 low level output transconductance - g fs ( a/v) v t = 2.3v to 2.8v i ds = 1 a to 10 a
ALD810023, ald810024, ald810025, advanced linear devices, inc. 17 of 17 ald810026, ald810027, ald810028 16 pin plastic soic package e d e a a 1 b s (45 ) l c h s (45 ) ? millimeters inches min max min max dim 1.75 0.25 0.45 0.25 10.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.385 0.140 0.224 0.024 0 0.010 0.069 0.010 0.018 0.010 0.394 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 9.80 3.50 5.70 0.60 0 0.25 a a 1 b c d-16 e e h l s ? soic-16 package drawing

▲Up To Search▲

Price & Availability of ALD810023

	To Download ALD810023 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .